1. Field of the Invention
The present invention generally relates to integrated circuits, and more particularly to fabricating semiconductor devices using a more robust replacement gate process flow and the resulting structure.
2. Background of Invention
Fabrication of finFET devices using a replacement gate (RG) or gate last technique may include the use of a polysilicon dummy gate material. During processing, the polysilicon dummy gate material may be removed and replaced with a metal gate. It may be difficult to remove the polysilicon dummy gate material selective to the surrounding structures. Typical removal techniques may be unable to remove all the polysilicon dummy gate material. Residual polysilicon dummy gate material remaining after the removal technique may contribute to device defects.
Therefore, a need exists for an integration method capable of completely removing the dummy gate material and reducing the risk of introducing device defects.